FIG. 1 diagrammatically illustrates a conventional ‘segregated’ system architecture containing a managed Ethernet layer-two switch subsystem 100 and a separate, layer-three edge router subsystem 200, that is configured to provide connectivity between a plurality of user terminals of a local area network (LAN), on the one hand, and a wide area network (WAN), such as the internet, on the other.
As shown therein, on the managed Ethernet layer-two switch subsystem side, a plurality of end user communication terminals 110 are connected to associated ports 121 of an Ethernet-based distribution switch 120. (Although the block diagram of FIG. 1 depicts only four user terminals 110 connected to the Ethernet-based distribution switch 120, it will be realized that in actuality the number of user terminals can expected to be in the thousands; only four are shown in order to reduce the complexity of the illustration.)
Ethernet switch 120 is typically configured as a managed, layer-two switch, and is coupled to a processor (CPU 125)-controlled switch fabric chip 130 (such as a Broadcom BCM5645 Strataswitch) within the managed Ethernet switch subsystem 100. In the WAN direction, the switch fabric chip 130 is further coupled to an Ethernet port 140. Ethernet port 140 is coupled by way of a communication link 150 (configured as an IEEE 802.1Q trunk link) to an associated Ethernet port 201 of the separate, layer-three edge router subsystem 200.
Within layer-three edge router subsystem 200, Ethernet port 201 is coupled to the router's communication control processor chip (CPU) 210 (such as a Freescale MPC866 chip) which, in turn, is coupled to a wide area network (WAN) port 220. WAN port 220 provides a digital communication interface to a wide area network such as the internet 230, and to a dialed back-up unit 240, that provides auxiliary connectivity to public switched telephone network 250.
In order to accommodate data traffic among a large number of user terminals, advantage is taken of the ability of the managed layer-two Ethernet distribution switch 120 to subdivide the LAN into multiple virtual LANs (VLANs). This increases the efficiency of the network by reducing the broadcast traffic load, as each VLAN provides virtual isolation of traffic between itself and other VLANs. Once traffic intended for the internet leaves a VLAN, it is the task of the layer-three edge router subsystem 200 to route the traffic from the VLAN to the WAN.
Within the system shown in FIG. 1, the managed layer-two Ethernet distribution switch 120 has the ability to handle and prioritize traffic based on a class of service (COS) field within the Ethernet frame. As traffic traverses the local area network (LAN), frames marked with a higher COS will receive bandwidth priority over frames marked with a lower COS.
In a like manner, many layer-three routers have the ability to handle and prioritize traffic based upon the contents of prescribed fields within the IP header. Once such field is the differential services code point (DSCP) field. A packet that needs to be routed from the LAN across the wide area network (WAN) will be given priority if it matches a given criterion. Traffic that is competing for the same bandwidth, but does not match the criterion, will be given a lower priority. The priority is set in the DSCP header. The priority of traffic in a layer-three router is termed quality of service (QOS).
In a frame relay network, low priority traffic is marked by setting a discard eligibility (DE) bit in the frame relay header. As such, traffic that has its DE bit cleared (to zero), or reset, will take precedence over traffic with the bit set (to a one). A layer-three router located at the edge of the LAN and a frame relay network have the ability to set this bit in the course of assembling the frame relay header.
As shown in FIG. 1, the layer two managed Ethernet switch subsystem 100 and the layer-three edge router subsystem 200 have historically been isolated systems that prioritize traffic independently of one another, and are tied together by way of an IEEE 802.1Q VLAN trunk, which is the physical link that transports information from multi VLANs to the WAN and vice versa. Such a configuration is inherently limited, because the prioritization employed by the Ethernet switch has no visibility to the layer-three router subsystem and vice versa.
Advantageously, this and other shortcomings of conventional segregated router—managed switch systems of the type shown in FIG. 1 can be effectively obviated by the invention detailed in the above-referenced '697 application, which integrates the router and switch functions into a combined architecture of the type shown in FIG. 2. In accordance with this integrated router-switch architecture, throughput connectivity is provided between local area network (LAN) ports serving a plurality of local area network users and a wide area network (WAN) port that provides connectivity with the internet, by automatically creating IEEE 802.1Q virtual local area network (VLAN) trunks in response to a reduced set of command inputs.
More specifically, as in the segregated system architecture of FIG. 1, the integrated system architecture of FIG. 2 contains an (managed layer-two) Ethernet-based distribution switch 120, for providing connectivity between a plurality of user communication terminals 110 of a local area network and a switch fabric chip 130. (Again, as in the system diagram of FIG. 1, only four user terminals 110 are shown in FIG. 2, in order to reduce the complexity of the drawings, it being understood that in actuality the number of user terminals can expected to be in the thousands. Also, as in the architecture of FIG. 1, switch fabric chip 130 may comprise a Broadcom BCM5645 Strataswitch.)
In the integrated architecture of FIG. 2, rather than being connected to a single user configurable Ethernet port through which access to a dedicated physical link to a further single user configurable Ethernet port in a separate router subsystem is afforded, the switch fabric chip 130 is coupled to a PCI bus 300 within the router/switch unit, through which communications with communication control processor chip (CPU) 210 are provided. As in the router subsystem 200 of FIG. 1, communication control processor chip 210 may comprise a Freescale MPC866 processor chip. The communication control processor chip 210, in turn, is coupled to a wide area network port 220, that provides a digital communication interface to the internet 230, and to a dialed back-up unit 240, that provides auxiliary connectivity to the public switched telephone network 250.
In addition, as in the system of FIG. 1, the managed layer-two Ethernet distribution switch 120 is used to subdivide the LAN into multiple virtual LANs (VLANs), with each VLAN providing virtual isolation of traffic between itself and other VLANs. Once traffic intended for the internet leaves a VLAN, it is the job of the integrated switch fabric/router to route the traffic from the VLAN to the WAN. However, unlike the architecture of FIG. 1, the switch fabric chip 130, which provides access to the VLANs, and the control processor 210, which performs the function of the edge router, are not isolated subsystems that are tied together by way of a dedicated physical IEEE 802.1Q VLAN trunk link. Instead, they are interfaced with each on the same motherboard by means of the PCI bus.
Pursuant to the invention disclosed in the '697 application, a virtual IEEE 802.1Q VLAN trunk link, that is functionally equivalent to the dedicated physical IEEE 802.1Q VLAN trunk link in the system of FIG. 1, is automatically created in response to the user issuing a prescribed set of commands to the communication control processor. These commands may be supplied to the control processor by way of a dial-up telecommunication link through the PSTN (DBU port) or by way of a web page browser via the internet (WAN port). The user commands and the responses they invoke are set forth in the state diagram example of FIG. 3, which shows the manner a SWITCH VLAN table is loaded with a pair of VLAN entries (x and y), and the CPU and SWITCH TAGGING states are loaded with tag entries supplied by the user.
Referring to FIG. 3, the system is initially in an IDLE state 301. In this state, a VLAN table that is maintained within the switch fabric chip 130 is empty, as shown by the variable: SWITCH_VLAN_TABLE=EMPTY, Consequently, as shown by the variable: SWITCH_INSERTS_TAGS=NO, the switch fabric chip is not tagging packets destined for the control processor chip 210; also, as shown by the variable: CPU_INSERTS_TAGS=NO, control processor chip 210 is not tagging packets destined for the switch fabric chip 130.
With the system in its idle state 301, the user proceeds to enter the command “int vlan x” (where x is the VLAN number of the Ethernet port of interest for a prescribed user terminal). In response to this command, the control processor transitions to the CREATE VLAN state 302. In this state, the VLAN table in the switch fabric is updated with the number of the new VLAN that has been created by the user input command. Since the user has supplied the identification of a VLAN, that VLAN number is written into the VLAN table maintained in the switch fabric chip, by the processor performing the function of the variable: SWITCH_VLAN_TABLE=Vlan x. Since the processor chip is not yet tagging packets, the variable CPU_INSERTS_TAGS=NO, and since the switch fabric is not yet tagging packets, the variable SWITCH_INSERTS_TAGS=NO.
The user then enters the command “no shutdown”, which initiates CPU TAGGING state 303 and SWITCH TAGGING state 304. In particular, in the CPU TAGGING state 302, the processor begins tagging packets destined for the switch fabric with the particular VLAN number that was created by the user. Here, the processor inserts the tag information supplied to the tag table, as denoted by the variable: CPU_INSERTS_TAGS=YES (vlan x). Since switch fabric tagging has not yet begun, the variable SWITCH_INSERTS_TAGS=NO. From CREATE VLAN state 301, the variable SWITCH_VLAN_TABLE=Vlan x.
In the SWITCH TAGGING state 304, the switch fabric begins tagging packets destined for the CPU with the particular VLAN number that has been supplied by the user. Thus, the variable: SWITCH_INSERTS_TAGS=YES (vlan x). Also, from the previous two states 302 and 303, the variable: CPU_INSERTS_TAGS=YES (vlan x) and the variable: SWITCH_VLAN_TABLE=Vlan x. With the variables of the CPU and SWITCH TAGGING states loaded with numerical Vlan identifications, traffic flowing between the control processor (CPU) and the switch fabric will have a VLAN tag appended to the frames as defined in IEEE 802.1Q. However, the process of performing the tagging and complying with IEEE 802.1Q has been accomplished without the user having to set all the variables. Loading of the requisite variables for the CPU and SWITCH tagging states has been performed automatically. Namely, the task of creating the IEEE 802.1Q VLAN trunk is no longer carried out by the user, but rather by the communication control processor.
In the example of configuring a LAN-to-WAN connection for a pair of VLANs, as the completion of the SWITCH TAGGING state 304, the user enters a new vlan tag command having a new vlan number (y) as: “int vlan y, (where y is the VLAN number of the Ethernet port of interest for another prescribed user terminal). In response to this command, the control processor transitions to the next CREATE VLAN state 305. As was the case for state 302, in CREATE VLAN state 305, the VLAN table in the switch fabric is updated with the new VLAN number that has been created by the user command. In particular, the new VLAN number (y) is written into the VLAN table maintained in the switch fabric chip, by the processor performing the function of the variable: SWITCH_VLAN_TABLE=Vlan x, y. Since the processor chip has begun tagging packets, the variable CPU_INSERTS_TAGS=YES (vlan x), and the variable SWITCH_INSERTS_TAGS=YES (vlan x).
Next, the user again enters the command “no shutdown”, which initiates CPU TAGGING state 306 and SWITCH TAGGING state 307. In CPU TAGGING state 306, the processor inserts new tag information supplied to the tag table, as denoted by the variable: CPU_INSERTS_TAGS=YES (x, y). Since switch fabric tagging has begun, the variable SWITCH_INSERTS_TAGS=YES (x). From state CREATE VLAN state 305, the variable SWITCH_VLAN_TABLE=Vlan x, y.
Finally, in the SWITCH TAGGING state 307, wherein the switch fabric tags packets destined for the CPU with the particular VLAN numbers supplied by the user, the variable: SWITCH_INSERTS_TAGS=YES (x, y). Also the variable: CPU_INSERTS_TAGS=YES (x, y) and the variable: SWITCH_VLAN_TABLE=Vlan x, y.
From the foregoing description of FIGS. 2 and 3, it will be appreciated that the integrated router and switch fabric system of the '697 application has two essential aspects that differentiate it from the prior art system of FIG. 1. The first is the fact that it has no physical trunk between the switch fabric and the router. Instead, a virtual IEEE 802.1Q trunk is created through software to provide connectivity between the switch fabric and the router's control processor. This means that the integrated switch fabric treats the processor interface back to the router just like a regular LAN port. Secondly, the virtual IEEE 802.1Q trunk is automatically generated by the router's control processor whenever a VLAN interface is created, by the user initiating the configuration of a LAN-to-WAN connection from a particular VLAN. All traffic flowing over this link have VLAN tags appended to the frames as defined in accordance with IEEE 802.1Q protocol.